Январь 2022

Self-Timed Fused Multiply-Add Unit Performance Improvement

Igor A. Sokolov, Yury A. Stepchenkov, Yury V. Rogdestvenski, Yury G. Diachenko, Asta V. Rogdestvenskene, Denis Y. Diachenko. Self-Timed Fused Multiply-Add Unit Performance Improvement // 2022 IEEE Conference of Russian…

Optimizing Data-flow Processor Architecture for Efficient Implementation of DSP Algorithms

Yury Stepchenkov, Dmitry Khilko, Yury Shikunov, Georgy Orlov. Optimizing Data-flow Processor Architecture for Efficient Implementation of DSP Algorithms // 2022 IEEE Conference of Russian Young Researchers in Electrical and Electronic…