Recurrent data-flow architecture: technical aspects of implementation and modeling results

D.V. Khilko, Yu. A. Stepchenkov, D. I. Shikunov, Yu. I. Shikunov. Recurrent data-flow architecture: technical aspects of implementation and modeling results // Problems of Advanced Micro- and Nanoelectronic Systems Development, 2017, Part II, Moscow, IPPM RAS, P. 59-64.

Abstract: The paper covers methods and features of implementing a prototype architecture based on a new recurrent data-flow paradigm of computing designed to solve problems of digital signal processing. Demonstration of key principles and technical solutions implemented in the new architecture is presented, with the example of the Fast Fourier Transform task, as well as estimation of the speed of this task with respect to its solutions on processors of traditional single-core and specialized data-flow multi-core architectures. Comparative estimates of the effectiveness of the implementation of algorithms for isolated words recognition in the environment of the recurrent architecture with respect to von Neumann single-core one are shown.

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