Yu. Shikunov, Yu. Stepchenkov, D. Khilko, G. Orlov. Graph-capsule construction toolset for data-flow computer architecture // 2018 IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (EIConRus) Moscow, Russia, 29 Jan.-1 Feb., 2018. — IEEE, P. 1419 — 1423. (indexed in Scopus).
Abstract: This paper covers the technical aspects of developing elements of methodology and software for multicore recurrent data-flow architecture. Nowadays capsule programming is similar to assembler: high efficiency accompanied by high complexity and unintuitiveness. We develop specialized toolset suite for creating and debugging software for hybrid architecture for recurrent signal processing called HARSP IDE. One of the toolsets included is the specialized data-flow graph builder that constructs graph-capsules. Automatic graph-capsule construction significantly reduces development complexity by providing visual overview of computational process and resource utilization. The paper covers development stages, architecture and functionality of graph builder. We show case the tool on Viterbi algorithm debugging.
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